(China (Mainland))
Product Summary
The MT48LC16M16A2TG-7E is a 256Mb SDRAM. It is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). The MT48LC16M16A2TG-7E provides for programmable READ or WRITE burst lengths of 1, 2, 4, or 8 locations, or the full page, with a burst terminate option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The MT48LC16M16A2TG-7E uses an internal pipelined architecture to achieve high-speed operation.
Parametrics
MT48LC16M16A2TG-7E absolute maximum ratings: (1)Voltage on VDD, VDDQ Supply Relative to VSS:-1V to +4.6V; (2)Voltage on Inputs, NC or I/O Pins Relative to VSS:-1V to +4.6V; (3)Operating Temperature:0℃ to +70℃; (4)Operating Temperature:-40℃ to +85℃; (5)Storage Temperature:-55℃ to +150℃; (6)Power Dissipation:1W.
Features
MT48LC16M16A2TG-7E features: (1)PC66-, PC100-, and PC133-compliant; (2)Fully synchronous; all signals registered on positive edge of system clock; (3)Internal pipelined operation; column address can be changed every clock cycle; (4)Internal banks for hiding row access/precharge; (5)Programmable burst lengths: 1, 2, 4, 8, or full page; (6)Auto Precharge, includes CONCURRENT AUTO PRECHARGE, and Auto Refresh Modes; (7)Self Refresh Mode; (8)64ms, 8,192-cycle refresh; (9)LVTTL-compatible inputs and outputs; (10)Single +3.3V ±0.3V power supply.
Diagrams
<IMG border=0 alt="MT48LC16M16A2TG-7E block diagram" src="http://www.seekic.com/uploadfile/ic-mfg/20128312832605.jpg">
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Pricing (USD) |
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 MT48LC16M16A2TG-7E IT:D TR |
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IC SDRAM 256MBIT 133MHZ 54TSOP |
Data Sheet |
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MT48LC16M16A2TG-7E L:D |
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IC SDRAM 256MBIT 133MHZ 54TSOP |
Data Sheet |
Negotiable |
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MT48LC16M16A2TG-7E L:D TR |
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IC SDRAM 256MBIT 133MHZ 54TSOP |
Data Sheet |
Negotiable |
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MT48LC16M16A2TG-7E:D TR |
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IC SDRAM 256MBIT 133MHZ 54TSOP |
Data Sheet |
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